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s6b 0 086 65 com / 1 28 seg drive r & controller for stn lcd july 2001 ver. 0 . 0 contents in this document are subject to change without notice. no part of this document may be reproduced or transmitted in any form or by any means, electronic or mechanical, for any purpose, without the express written permission of lcd driver ic team. precautions for light light has characteristics to move electrons in the integrated circuitry of semiconductors, therefore may change the characteristics of semiconductor devices when irradiated with light. consequently, the users of the packages wh ich may expose chips to external light such as cob, cog, tcp and cof must consider effective methods to block out light from reaching the ic on all parts of the surface area, the top, bottom and the sides of the chip. follow the precautions below when usin g the products. 1. consider and verify the protection of penetrating light to the ic at substrate ( board or glass) or product design stage. 2. always test and inspect products under the environment with no penetration of light.
65 com / 1 28 seg driver & contro ller for stn lcd preliminary spec. ve r. 1 . 0 s6b0755 2 s6b0 086 specification revision history version content date 0.0 original july.2001
s6b0755 pre liminary spec. ver. 1.0 65 com / 128 seg driver & contro ller for stn lcd 3 co ntents introduction ................................ ................................ ..................... ? ! ????? F???? ?? ???? . block diagram ................................ ................................ .................. ? ! ????? F???? ?? ???? . pad configuration ................................ ................................ ........... ? ! ????? F???? ?? ???? . pad center coordinat es ................................ ................................ . ? ! ????? F???? ?? ???? . pin description ................................ ................................ ................. ? ! ????? F???? ?? ???? . power supply ................................ ................................ ................ ? ! ????? F???? ?? ???? . lcd driver supply ................................ ................................ ......... ? ! ????? F???? ?? ???? . system control ................................ ................................ ............. ? ! ????? F???? ?? ???? . micropr ocessor interface ................................ ........................ ? ! ????? F???? ?? ???? . lcd driver outputs ................................ ................................ ....... ? ! ????? F???? ?? ???? . functional descripti on ................................ ................................ .. ? ! ????? F???? ?? ???? . microprocessor inter face ................................ ........................ ? ! ????? F???? ?? ???? . display data ram (dd ram) ................................ ............................ ? ! ????? F???? ?? ???? . lcd display circuits ................................ ................................ ...... ? ! ????? F???? ?? ???? . lcd driver circuit ................................ ................................ .......... ? ! ????? F???? ?? ???? . power supply circuit s ................................ ................................ . ? ! ????? F???? ?? ???? . referece circuit exa mples ................................ ......................... ? ! ????? F???? ?? ???? . reset circuit ................................ ................................ ................... ? ! ????? F???? ?? ? ??? . instruction descript ion ................................ ................................ . ? ! ????? F???? ?? ???? . specifications ................................ ................................ .................. ? ! ????? F???? ?? ???? . absolute maximum rat ings ................................ .......................... ? ! ????? F???? ?? ???? . dc characteristics ................................ ................................ ....... ? ! ????? F???? ?? ???? . a c characteristics ................................ ................................ ....... ? ! ????? F???? ?? ???? . reference applicatio ns ................................ ................................ . ? ! ????? F???? ?? ???? . microprocessor inter face ................................ ........................ ? ! ????? F???? ?? ???? . connections between s6b0755 and lc d panel ......................... ? ! ????? F???? ?? ???? .
S6B0086 80ch common/ segment driver for d ot matrix lcd 4 introduction the S6B0086 (tqfp type: s6b2086) is a lcd driver lsi which is fabricated by low power cmos high voltage process technology. in segment driver mode, it can be interfaced in 1 - bit ser ial or 4 - bit parallel method by the controller. in common driver mode, dual type mode is applicable. and in seg ment mode application, the power down function reduces power consumption. features ? power supply voltage: + 5v 10 %, + 3v 10% ? supply voltage for display: 6 to 28v (v dd - v ee ) ? 4 - bit parallel/1 - bit serial data processing (in segment mode) ? single mode operation/dual mode operation (in common mode) ? power down function (in segment mode) ? applicable lcd duty: 1/64 ? 1/256 ? interface drivers com (cascade) seg (cascade) S6B0086 S6B0086 ? high voltage cmos process ? available pkg type: bare die, 100 qfp, 100 tqfp or tcp
80ch common/segment driver for dot matri x lcd S6B0086 5 package information S6B0086 pkg type 100qfp package S6B0086 (100-qfp) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 sc51 sc52 sc53 sc54 sc55 sc56 sc57 sc58 sc59 sc60 sc61 sc62 sc63 sc64 sc65 sc66 sc67 sc68 sc69 sc70 sc71 sc72 sc73 sc74 sc75 sc76 sc77 sc78 sc79 sc80 sc50 sc49 sc48 sc47 sc46 sc45 sc44 sc43 sc42 sc41 sc40 sc39 sc38 sc37 sc36 sc35 sc34 sc33 sc32 sc31 erb v ee v5 v43 v12 v0 cs m disp0ffb v dd shl v ss d4_dr d3_dm d2_dl d1_sid cl2 ams cl1 elb sc30 sc29 sc28 sc27 sc26 sc25 sc24 sc23 sc22 sc21 sc20 sc19 sc18 sc17 sc16 sc15 sc14 sc13 sc12 sc11 sc10 sc9 sc8 sc7 sc6 sc5 sc4 sc3 sc2 sc1
S6B0086 80ch common/ segment driver for d ot matrix lcd 6 S6B0086tcp type tcp n c n c n c s c 8 0 s c 7 9 s c 7 8 s c 7 7 s c 7 6 s c 7 5 s c 7 4 ---------------- s c 7 s c 6 s c 5 s c 4 s c 3 s c 2 s c 1 n c n c n c S6B0086 e r b v e e v 5 v 4 3 v 1 2 v 0 c s m d i s p 0 f f b v d d s h l v s s d 4 - d r d 3 - d m d 2 - d l d 1 - s i d c l 2 a m s c l 1 e l b #1 #20 * package type = 100-tcp-35mm * input lead pitch = 0.80mm * output lead pitch = 0.22mm
80ch common/segment driver for dot matri x lcd S6B0086 7 pad diagram (S6B0086 /S6B0086 tcp) S6B0086 chip size: 4530 4390 pad size: 98 98 unit: m m (0, 0) x y 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 sc52 sc53 sc54 sc55 sc56 sc57 sc58 sc59 sc60 sc61 sc62 sc63 sc64 sc65 sc66 sc67 sc68 sc69 sc70 sc71 sc72 sc73 sc74 sc75 sc76 sc77 sc78 sc79 sc80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 sc29 sc28 sc27 sc26 sc25 sc24 sc23 sc22 sc21 sc20 sc19 sc18 sc17 sc16 sc15 sc14 sc13 sc12 sc11 sc10 sc9 sc8 sc7 sc6 sc5 sc4 sc3 sc2 sc1 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 erb v ee v5 v43 v12 v0 cs m dispoffb v dd shl v ss d4_dr d3_dm d2_dl d1_sid cl2 ams cl1 elb 1 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 sc51 sc50 sc49 sc48 sc47 sc46 sc45 sc44 sc43 sc42 sc41 sc40 sc39 sc38 sc37 sc36 sc35 sc34 sc33 sc32 sc31 sc30
S6B0086 80ch common/ segment driver for d ot matrix lcd 8 pad center coordinat es (S6B0086/S6B0086t cp) pad pad coordinates pad pad coordinates pad pad coordinates no. name x y no. name x y no. name x y 1 sc51 - 1690 1959 35 v12 - 900 - 1959 69 sc19 2029 544 2 sc52 - 2029 1884 36 v0 - 775 - 1959 70 sc20 2029 678 3 sc53 - 2029 1750 37 vs - 600 - 1959 71 sc21 2029 812 4 sc54 - 2029 1616 38 m - 475 - 1959 72 sc22 2029 946 5 sc55 - 2029 1 482 39 disp0ffb - 350 - 1959 73 sc23 2029 1080 6 sc56 - 2029 1348 40 vdd - 225 - 1959 74 sc24 2029 1214 7 sc57 - 2029 1214 41 shl - 100 - 1959 75 sc25 2029 1348 8 sc58 - 2029 1080 42 vss 25 - 1959 76 sc26 2029 1482 9 sc59 - 2029 946 43 d4_dr 266 - 1959 77 sc27 202 9 1616 10 sc60 - 2029 812 44 d3_dm 470 - 1959 78 sc28 2029 1750 11 sc61 - 2029 678 45 d2_dl 711 - 1959 79 sc29 2029 1884 12 sc62 - 2029 544 46 d1_sid 915 - 1959 80 sc30 1690 1959 13 sc63 - 2029 410 47 cl2 1040 - 1959 81 sc31 1529 1959 14 sc64 - 2029 276 48 elb 1165 - 1959 82 sc32 1368 1959 15 sc65 - 2029 142 49 cl1 1290 - 1959 83 sc33 1207 1959 16 sc66 - 2029 8 50 elb 1496 - 1959 84 sc34 1046 1959 17 sc67 - 2029 - 126 51 sc1 2029 - 1884 85 sc35 885 1959 18 sc68 - 2029 - 260 52 sc2 2029 - 1735 86 sc36 724 1959 19 sc69 - 2029 - 394 53 sc3 2029 - 1601 87 sc37 563 1959 20 sc70 - 2029 - 528 54 sc4 2029 - 1467 88 sc38 402 1959 21 sc71 - 2029 - 662 55 sc5 2029 - 1333 89 sc39 241 1959 22 sc72 - 2029 - 797 56 sc6 2029 - 1199 90 sc40 80 1959 23 sc73 - 2029 - 931 57 sc7 2029 - 1065 91 sc41 - 80 1959 24 sc74 - 2029 - 1065 58 sc8 2029 - 931 92 sc42 - 241 1959 25 sc75 - 2029 - 1199 59 sc9 2029 - 797 93 sc43 - 402 1959 26 sc76 - 2029 - 1333 60 sc10 2029 - 662 94 sc44 - 563 1959 27 sc77 - 2029 - 1467 61 sc11 2029 - 528 95 sc45 - 724 1959 28 sc78 - 2029 - 1601 62 sc12 2029 - 394 96 sc46 - 885 1959 29 sc79 - 2029 - 1735 63 sc13 2029 - 260 97 sc47 - 1046 1959 30 sc80 - 2029 - 1884 64 sc14 2029 - 126 98 sc48 - 1207 1959 31 erb - 1479 - 1959 65 sc15 2029 8 99 sc49 - 1368 1959 32 vee - 1275 - 1959 66 sc16 2029 142 100 sc50 - 15 29 1959 33 v5 - 1150 - 1959 67 sc17 2029 276 34 v43 - 1025 - 1959 68 sc18 2029 410
80ch common/segment driver for dot matri x lcd S6B0086 9 S6B0086 tqfp type (s 6b2086) 100tqfp sc28 sc29 sc30 sc31 sc32 sc33 sc34 sc35 sc36 sc37 sc38 sc39 sc40 sc41 sc42 sc43 sc44 sc45 sc46 sc47 sc48 sc49 sc50 sc51 sc52 s6b2086 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 sc27 sc26 sc25 sc24 sc23 sc22 sc21 sc20 sc19 sc18 sc17 sc16 sc15 sc14 sc13 sc12 sc11 sc10 sc9 sc8 sc7 sc6 sc5 sc4 sc3 sc53 sc54 sc55 sc56 sc57 sc58 sc59 sc60 sc61 sc62 sc63 sc64 sc65 sc66 sc67 sc68 sc69 sc70 sc71 sc72 sc73 sc74 sc75 sc76 sc77 sc2 sc1 elb cl1 ams cl2 d1_sid d2_dl d3_dm d4_dr vss shl vdd disp0ffb m cs v0 v12 v43 v5 vee erb sc80 sc79 sc78
S6B0086 80ch common/ segment driver for d ot matrix lcd 10 pad diagram (s6b2086 ) s6b2086 chip size: 4410 x 4600 pad size: 98 x 98 unit: m m (0, 0) x y 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 sc52 sc51 sc50 sc49 sc48 sc47 sc46 sc45 sc44 sc43 sc42 sc41 sc40 sc39 sc38 sc37 sc36 sc35 sc34 sc33 sc32 sc31 sc30 sc29 sc28 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 sc53 sc54 sc55 sc56 sc57 sc58 sc59 sc60 sc61 sc62 sc63 sc64 sc65 sc66 sc67 sc68 sc69 sc70 sc71 sc72 sc73 sc74 sc75 sc76 sc77 sc27 sc26 sc25 sc24 sc23 sc22 sc21 sc20 sc19 sc18 sc17 sc16 sc15 sc14 sc13 sc12 sc11 sc10 sc9 sc8 sc7 sc6 sc5 sc4 sc3 51 52 53 54 61 63 60 64 65 62 66 67 68 73 55 57 59 58 56 72 71 69 70 75 74 sc78 sc79 sc80 erb v ee v0 v12 v43 v5 cs v ss shl v dd dispoffb m d4_dr d3_dm d2_dl d1_sid cl1 ams cl2 elb sc1 sc2
80ch common/segment driver for dot matri x lcd S6B0086 11 pad center coordinat es (s6b2086) pad pad coord inates pad pad coordinates pad pad coordinates no. name x y no. name x y no. name x y 1 sc28 - 1969 1691 35 sc62 - 515 - 2064 69 d1_sid 1969 924 2 sc29 - 1969 1551 36 sc63 - 390 - 2064 70 cl2 1969 1049 3 sc30 - 1969 1411 37 sc64 - 265 - 2064 71 ams 1969 1174 4 sc31 - 1969 1271 38 sc65 - 140 - 2064 72 cl1 1969 1299 5 sc32 - 1969 1131 39 sc66 - 15 - 2064 73 elb 1969 1504 6 sc33 - 1969 991 40 sc67 110 - 2064 74 sc1 1969 1904 7 sc34 - 1969 851 41 sc68 235 - 2064 75 sc2 1969 2029 8 sc35 - 1969 711 42 sc69 360 - 2064 76 sc3 1360 2064 9 sc36 - 1969 571 43 sc70 485 - 2064 77 sc4 1235 2064 10 sc37 - 1969 431 44 sc71 610 - 2064 78 sc5 1110 2064 11 sc38 - 1969 291 45 sc72 735 - 2064 79 sc6 985 2064 12 sc39 - 1969 151 46 sc73 860 - 2064 80 sc7 860 2064 13 sc40 - 1969 11 47 sc74 985 - 20 64 81 sc8 735 2064 14 sc41 - 1969 - 151 48 sc75 1110 - 2064 82 sc9 610 2064 15 sc42 - 1969 - 291 49 sc76 1235 - 2064 83 sc10 485 2064 16 sc43 - 1969 - 431 50 sc77 1360 - 2064 84 sc11 360 2064 17 sc44 - 1969 - 571 51 sc78 1969 - 2029 85 sc12 235 2064 18 sc45 - 1969 - 711 52 sc79 1969 - 1904 86 sc13 110 2064 19 sc46 - 1969 - 851 53 sc80 1969 - 1779 87 sc14 - 15 2064 20 sc47 - 1969 - 991 54 erb 1969 - 1475 88 sc15 - 140 2064 21 sc48 - 1969 - 1131 55 vee 1969 - 1270 89 sc16 - 265 2064 22 sc49 - 1969 - 1271 56 v5 1969 - 1145 90 sc17 - 390 2064 23 sc50 - 1969 - 1411 57 v43 1969 - 1020 91 sc18 - 515 2064 24 sc51 - 1969 - 1551 58 v12 1969 - 895 92 sc19 - 640 2064 25 sc52 - 1969 - 1691 59 v0 1969 - 770 93 sc20 - 765 2064 26 sc53 - 1640 - 2064 60 cs 1969 - 595 94 sc21 - 890 2064 27 sc54 - 1515 - 2064 6 1 m 1969 - 470 95 sc22 - 1015 2064 28 sc55 - 1390 - 2064 62 disp0ffb 1969 - 345 96 sc23 - 1140 2064 29 sc56 - 1265 - 2064 63 vdd 1969 - 220 97 sc24 - 1265 2064 30 sc57 - 1140 - 2064 64 shl 1969 - 95 98 sc25 - 1390 2064 31 sc58 - 1015 - 2064 65 vss 1969 30 99 sc26 - 151 5 2064 32 sc59 - 890 - 2064 66 d4_dr 1969 272 100 sc27 - 1640 2064 33 sc60 - 765 - 2064 67 d3_dm 1969 477 34 sc61 - 640 - 2064 68 d2_dl 1969 719
S6B0086 80ch common/ segment driver for d ot matrix lcd 12 block diagram v0 v12 v43 v5 vee m disp0ffb 80-bit 4-level driver output level selector 80-bit driver 80-bit data latch/ common data bi-directional shift register 20 x 4-bit segment data bi-directional shift register clock control power down function sc1 sc2 sc3 sc78 sc79 sc80 cl1 cl2 cs elb erb vss d4_dr d3_dm d2_dl d1_sid ams data latch control sck lck vdd
80ch common/segment driver for dot matri x lcd S6B0086 13 block description name function com/seg clock control ge nerates latch clock (lck), shift clock (sck) and control clock timing according to the input of cl1, cl2 and con trol inputs (cs, ams). in common driver application mode, this block generates the shift clock (lck) for the com - mon data bi - directional shift register. com/seg data latch control determines the direction of segment data shift, and input data of each bi - directional shift register. in 4 - bit segment data parallel transfer mode, data is shifted by a 4 - bit unit. in common driver application mode, d ata is transferred to the common data shift register directly, which disables this block. seg power down function controls the clock enable state of the current driver according to the input value of enable pin (elb or erb). if enable input value is ? low ? , every clock of the current driver is enabled and the clock control block works. but if enable input is ? high ? , current driver is disabled and the input data value has no effect on the output level. so power consumption can be lowered. seg output level s elector controls the output voltage level according to the input control pin (m and dispoffb) (refer to pin descrip tion). com/seg 20x4 - bit segment data i - directional shift register stores output data value by shifting the input values. in 1 - bit serial in terface mode application, all 80 shift clocks (sck) are needed to store all the display data. but in 4 - bit parallel transfer mode application, only 20 clocks are needed. in common driver application mode, this block does not work. seg 80 - bit data latch / common data i - directional shift register in segment driver application mode, the data from the 20x4 - bit segment data shift register are latched for segment driver output. in single - type common driver application,1 - bit input data (from dl or dr pin) is shi fted and latched by the direction according to the shl signal input. in dual - type common application mode, 80 - bit registers are divided by two blocks and controlled independently (refer to note 3). com/seg 80 - bit level shifter voltage level shifter block for high voltage part. the inputs of this block are of logical voltage level and the outputs of this block are at high voltage level value. these values are input in to the driver. seg 80 - bit 4 - level driver selects the output voltage level according to m and latched data value. if the data value is ?high? the driver output is at selected voltage level (v0 or v5), and in the reverse case the driver output value is at the non - selected level (v12 or v43). in segment driver application mode, non - selected outpu t value is v2 or v3. and when in common driver application, this value becomes v1 or v4. seg
S6B0086 80ch common/ segment driver for d ot matrix lcd 14 pin description pin i/o name function interface v0, v12, v43, v5 i lcd driver output voltage level bias supply voltage input to drive the lcd. bias voltage divided by the resistance is usually used as a supply voltage source (refer to note 2). power sc1 - sc80 o lcd driver output display data output pin which corresponds to the respective latch contents. one of v0, v12, v34 and v5 is selected as a display d riving voltage source according to the combination of the latched data level and m signal (refer to note 1). lcd cl2 i data shift clock clock pulse input for the bi - directional shift register. in segment driver application mode, the data is shifted to 20 x 4 - bit segment data shift. the clock pulse, which was input when the enable bit (elb/erb) is in not active condition, is invalid. in common driver application mode, the data is shifted to 80 - bit common data bi - directional shift register by the cl1 cloc k. hence, this clock pin is not used (open or connect this pin to vdd). controller m i ac signal for lcd driver output alternate signal input pin for lcd driving. normal frame inversion signal is input in to this pin. controller cl1 i data latch clock ? in segment driver application mode, this signal is used for latching the shift register contents at the falling edge of this clock pulse. cl1 pulse ?high? level initializes power - down function block. ? in common driver application mode, cl1 is used as a shifting clock of common output data. controller dispoffb i display off control control input pin to fix the driver output (sc1~sc80) to v0 level, during ?low? value input. lcd becomes non - selected by v0 level output from every output of segment drivers a nd every output of common drivers. controller cs i com/seg mode control when cs = ?low?, S6B0086 is used as an 80 - bit segment driver. when cs = ?high?, S6B0086 is set to an 80 - bit common driver v dd /v ss ams i application mode select according to the input value of the ams and the cs pin, application mode of S6B0086 is differs as shown below. css ams apllication mode 0 0 0 1 1 0 4-bit parallel interface mode 1-bit serial interface mode single type application mode com/seg seg com 1 1 dual type application mode v dd /v ss
80ch common/segment driver for dot matri x lcd S6B0086 15 pin description (con tinued) pin i/o name function interface d1_sid, d2_dl, d3_dm, d4_dr i/o display data input/serial input dat a/left, right data input output in segment driver application mode, these pins are used as 4 - bit data input pin (when 4 - bit parallel interface mode : ams = ?low?), or d1_sid is used as serial data input pin and other pins are not used (connect these to v dd ) (when 1 - bit serial inter face mode : ams = ?high?). in common driver application mode, the data is shifted from d2_dl(d4_dr) to d4_dr(d2_dl), when in single type interface mode (ams = ?low?). in dual - type application case, the data are shifted from d2_dl and d3_dm (d4_dr and d3_dm) to d4_dr(d2_dl). in each case the direction of the data shift and the connection of data pins are determined by shl input (refer to note 3, note 4). controller shl input shift direction control when shl = ?low?, data is shifte d from left to right. when shl = ?high?, the direction is reversed. (refer to note3) v dd /v ss elb, erb i/o enable data input/output in segment driver application mode, the internal operation is enabled only when enable input (elb or erb) is ?low? (power down function). when several drivers are serially connected, the enable state of each driver is shifted according to the shl input. connect these pins as below. shl l h segment driver elb output (open) input (v ss ) input (v ss ) output (open) erb in common driver application mode, power down function is not u sed. open these pins. note 1. output level control m latched data dispoffb output level (sc1 - sc80) seg mode com mode l l h v12 (v2) v12 (v1) l h h v0 v5 h l h v43 (v3) v43 (v4) h h h v5 v0 x x l v0 v0
S6B0086 80ch common/ segment driver for d ot matrix lcd 16 note 2. lcd driving voltage applicatio n circuit (1) segment driver application (cs = ?low?) v0 S6B0086 v12 v43 v5 vss v dd to com driver to com driver v3 v dd c v0 v1 v2 v4 v5 v ee r r (n-4)r r r seg1- seg80 to lcd panel v0, v5 v2, v3 selection level non-selection level * n = 9 (when 1/64 duty) to 17 (when 1/256 duty) (2) common driver application (cs = ?high?) v0 S6B0086 v12 v43 v5 v ss v dd to seg driver v3 v dd c v0 v1 v2 v4 v5 v ee r r (n-4)r r r com1- com80 to lcd panel v0, v5 v1, v4 selection level non-selection level * n = 9 (when 1/64 duty) to 17 (when 1/256 duty) v dd
80ch common/segment driver for dot matri x lcd S6B0086 17 note 3. data shift direction according to control signals (1) when cs = ?low? (segment driver app lication) d1 d2 d3 d4 first data last data shift direction sc80 first data shift direction d1 d2 d3 d4 last data last data (d1_sid) first data shift direction first data last data shift direction sc79 sc78 sc77 sc76 sc75 sc74 sc73 4-bit parallel data transfer mode (seg) 1-bit serial data transfer mode (seg) data direction application mode sc4 sc3 sc2 sc1 d1 d2 d4 d3 d1 d2 d4 d3 d1 d2 d4 d3 sc80 sc79 sc78 sc77 sc76 sc75 sc74 sc73 sc4 sc3 sc2 sc1 d1 d2 d4 d3 d1 d2 d4 d3 d1 d2 d4 d3 sc73 sc74 sc75 sc76 sc77 sc78 sc79 sc80 sc1 sc2 sc3 sc4 sc73 sc74 sc75 sc76 sc77 sc78 sc79 sc80 sc1 sc2 sc3 sc4 l l ams shl h l h h d1_sid, d2_dl, d3_dm d4_dr input pin d1_sid
S6B0086 80ch common/ segment driver for d ot matrix lcd 18 (2) when cs = ?high? (common driver application) shift direction input data (d2_dl) output data (d4_dr) data direction ams shl application mode sc1 sc2 sc3 sc38 sc39 sc40 sc41 sc42 sc43 sc78 sc79 sc80 shift direction input data (d2_dl) output data (d4_dr) sc1 sc2 sc3 sc38 sc39 sc40 sc41 sc42 sc43 sc78 sc79 sc80 d2_dl d4_dr d2_dl, d3_dm d4_dr, d3_dm input pin shift direction input data1 (d2_dl) output data (d4_dr) sc1 sc2 sc3 sc38 sc39 sc40 sc41 sc42 sc43 sc78 sc79 sc80 input data2 (d3_dm) shift direction input data (d2_dl) output data1 (d4_dr) sc1 sc2 sc3 sc38 sc39 sc40 sc41 sc42 sc43 sc78 sc79 sc80 input data2 (d3_dm) l l h l h h single-type application mode (com) dual-type application mode (com)
80ch common/segment driver for dot matri x lcd S6B0086 19 note 4. usage of data pins com/seg application mode shl data interface pin (cs pin) (ams pin) d1_sid d2_dl d3_dm d4_dr seg (cs =?low? ) 4 - bit parallel interface mode (ams = ?low?) x d1 (input) d2 (input2) d3 (input3) d4 (input4) 1 - bit serial interface mode (ams = ?high?) x sid (input) connect to v dd com (cs = ? high?) single - type application mode l open dl (input) open dr (output) (a ms = ?low?) h dl (output) dr (input) dual - type application mode (ams = ?high?) l open dl (input1) dm (input2) dr (output2) h dl (output2) dm (input2) dr (input1) maximum absolute lim it characteristic symbol value unit power supply voltage v dd - 0 .3 to +7.0 v driver supply voltage v lcd 0 to +30 input voltage v in - 0.3 to v dd + 0.3 operating temperature t opr - 30 to +85 c storage temperature t stg - 55 to +150 note: voltage greater than above may do damage to the circuit.
S6B0086 80ch common/ segment driver for d ot matrix lcd 20 electrical character istics dc characteristics (1) segment driver application (v ss = 0v, ta = - 30 to +85 c) characteristic symbol test condition min. typ. max. unit operating v dd ? 2.7 ? 5.5 voltage1 v lcd v in = v dd - v ee 6 ? 28 v input voltage (1) v ih ? 0.8v dd ? v dd v il ? 0 ? 0.2v dd output voltage (2) v oh i oh = - 0.4ma v dd - 0.4 ? ? v v ol i ol = 0.4ma ? ? 0.4 input leakage current 1 (1) i il1 v in = v dd to v ss - 10 ? 10 m a input leakage current 2 (3) i il2 v in = v dd to v ee - 25 ? 25 on resistance (4) r on i on = 100 m a ? 2 4 k w supply current (5) i stby f cl1 = 32khz m = v ss v ss pin ? ? 100 m a i dd f cl1 = 32khz v dd = 5v ? ? 5 ma f m = 80hz v dd = 3v ? ? 2 i ee v dd = 5v ? ? 500 m a notes: 1. applied to cl1, cl2, elb, erb, d1_sid - d4_dr, shl, dispoffb, m, cs, ams pin 2. elb, erb pin 3. v0, v12, v43, v5 pin 4. v lcd = v dd - v ee , v0 = v dd = 5v, v5= v ee = - 23 v v12 = v dd - 2/n(v lcd ), v43 = v ee +2/n(v lcd ), n = 17 (1/256 duty, 1 /17 bias) 5. v0 = v dd , v12 = 1.71v(v dd = 5v) or - 0.06v (v dd = 3v), v43 = - 19.71 v(v dd = 5v) or - 19.94v (v dd = 3v), v5 = v ee = - 23v, no - load condition (1/256 duty, 1/17 bias) 4 - bit parallel interface mode i stby : v dd = 5v, f cl2 = 5.12mhz, shl = v ss , di spoffb = v dd , m = v ss , display data pattern = 0000 i dd : v dd = 3v, f cl2 = 4mhz, display data pattern = 0101 v dd = 5 v, f cl2 = 5.12mhz, display data pattern = 0101 i ee : v dd = 5v, f cl2 = 5.12mhz, display data pattern = 0101, v ee pin
80ch common/segment driver for dot matri x lcd S6B0086 21 dc characteristics (continued) (2) common driver application (v ss = 0v, ta = - 30 to +85 c) characteristic symbol test condition min. typ. max. unit operating v dd ? 2.7 ? 5.5 v voltage v lcd v in = v dd ? v ee 6 ? 28 input voltage (1) v ih ? 0.8v dd ? v dd v il ? 0 ? 0.2v dd output voltage (3) v oh i oh = - 0.4ma v dd ? 0.4 ? ? v v ol i ol = 0.4ma ? ? 0.4 input leakage current 1 (1) i il1 v in = v dd to v ss - 10 ? 10 m a input leakage current (2) i il2 v in = 0v, v dd = 5v (pull up) - 50 - 125 - 250 input leakage current 3 (4) i il3 v in = v dd to v ee - 25 ? 25 on resistance (5) r on i on = 100 m a ? 2 4 k w supply current (6) i stby f cl1 = 32khz v ss pin ? ? 100 m a i dd f cl1 = 32khz v dd = 5v ? ? 200 f m = 80hz v dd = 3v ? ? 120 i ee v dd = 5v ? ? 150 notes: 1. applied to cl1, d2_dl (shl = low), d4_dr (shl = high), shl, dispoffb, m, cs, ams pin 2. pull - up input pins : cl2, d1_sid, d3_dm (ams = high), elb (shl = low), erb (shl = high) 3. d2_dl (shl = high) , d4_dr (shl = low) pin 4. v0, v12, v43, v5 pin 5. v lcd = v dd - v ee , v0 = v dd = 5v, v5 = v ee = - 23v v12 = v dd - 1/n(v lcd ), v43 = v ee +1/n(v lcd ), n = 17(1/256 duty, 1/17 bias) 6. v0 = v dd , v12 = 3.35v (v dd = 5v) or 1.47v (v dd = 3v), v43 = - 21.35v (v dd = 5 v) or - 21.47v (v dd = 3 v), v5 = v ee = - 23 v, no - load condition (1/256 duty, 1/17 bias) single - type mode operation : ams = v ss , shl = v ss , dispoffb = v dd d1_sid = d3_dm = v dd , d4_dr = open, elb = erb = open, i stby : v dd = 5v, m = v ss , d2_dl = v ss i dd : f m = 80hz, d2_dl = v dd v dd = 3 v, display data pattern = 10000000..., 01000000..., 00100000..., 00010000..., .. v dd = 5 v, display data pattern = 10000000..., 01000000..., 00100000..., 00010000..., .. i ee : f m = 80hz, d2_dl = v dd v dd = 5v, current through v ee pin, display data pattern = 10000000..., 01000000...,
S6B0086 80ch common/ segment driver for d ot matrix lcd 22 00100000..., 00010000... ac characteristics (1) segment driver application (v ss = 0v, ta = - 30 to +85 c) characteristic symbol test (1) v dd = 5v 10% (2) v dd = 3v 10% unit condition min. typ. max. min. typ. max. clock cycle time t cy duty = 50% 125 ? ? 250 ? ? ns clock pulse width t wck ? 45 ? ? 95 ? ? clock rise/fall time t r /t f ? ? ? ? ? ? 30 data set - up time t ds ? 30 ? ? 65 ? ? data hold time t dh ? 30 ? ? 65 ? ? clock set - up time t cs ? 80 ? ? 120 ? ? clock hold time t ch ? 80 ? ? 120 ? ? propagation delay time t phl elb output ? ? 60 ? ? 125 erb output 60 125 e lb,erb set - up time t psu elb input 30 ? ? 65 ? ? erb input 30 65 dispoffb low pulse width t wdl ? 1.2 ? ? 1.2 ? ? m s dispoffb clear time t cd ? 100 ? ? 100 ? ns m - out propagation delay time t pd1 c l = 15pf ? ? 1.0 ? ? 1.2 m s cl1 - out propagation delay time t pd2 ? ? 1.0 ? ? 1.2 dispoffb - out propagation delay time t pd3 ? ? 1.0 ? ? ?
80ch common/segment driver for dot matri x lcd S6B0086 23 ac characteristics ( continued) (2) common driver application (v ss = 0v, ta = - 30 to +85 c) characteristic symbol test (1) v dd = 5 v 10% (2) v dd = 3v 10% unit condition min. t yp. max. min. typ. max. clock cycle time t cy duty = 50% 250 ? ? 500 ? ? ns clock pulse width t wck ? 45 ? ? 95 ? ? clock rise/fall time t r /t f ? ? ? 50 ? ? 50 data set - up time t ds ? 30 ? ? 65 ? ? data hold time t dh ? 30 ? ? 65 ? ? dispoffb low pul se width t wdl ? 1.2 ? ? 1.2 ? ? m s dispoffb clear time t cd ? 100 ? ? 100 ? ? ns output delay time t dl c l = 15pf ? ? 200 ? ? 250 m ? out propagation delay time t pd1 ? ? 1.0 ? ? 1.2 m s cl1 - out propagation delay time t pd2 ? ? 1.0 ? ? 1.2 dispoffb - out propagation delay time t pd3 ? ? 1.0 ? ? 1.2
S6B0086 80ch common/ segment driver for d ot matrix lcd 24 ac characteristics ( continued) (3) segment driver application timing cl1 1 2 3 19 20 0.2v dd 0.8v dd t phl 0.2v dd 0.2v dd t psu cl2 elb, erb (output 1) elb, erb (input 2) m cl1 0.8v dd 0.2v dd 0.8v dd 0.2v dd t wck t ch 0.8v dd 0.2v dd t cs t wck 0.2v dd 0.8v dd 0.8v dd 0.2v dd t wck t f t cy t ds t dh 0.8v dd 0.2v dd t cd t wdl cl2 d1_sid - d4_dr disp0ffb 0.2v dd 0.8v dd t pd1 0.2v dd t pd2 0.2v dd 0.8v dd t pd3 cl1 dispoffb sc1 - sc80 (latched data) t r
80ch common/segment driver for dot matri x lcd S6B0086 25 ac characteristics ( continued) (4) common driver application timing m cl1 0.8v dd 0.2v dd t cy (*1) di (*1) do disp0ffb 0.2v dd 0.8v dd t pd1 0.2v dd t pd2 0.2v dd 0.8v dd t pd3 cl1 dispoffb sc1 - sc80 (latched data) 0.8v dd 0.2v dd t f t f t dh t ds t dwckh t r 0.8v dd 0.2v dd 0.8v dd 0.2v dd t dl 0.8v dd 0.2v dd t cd t wdl (*1) when in single-type interface mode di => d2_dl (shl = l), d4_dr (shl = h) do => d4_dr (shl = l ), d2_dl (shl = h) when in dual-type interface mode di => d2_dl and d3_dm (shl = l), d4_dr and d3_dm (shl = h) do => d4_dr (shl = l), d2_dl (shl = h)
S6B0086 80ch common/ segment driver for d ot matrix lcd 26 power down function in the case o f cascade connection of segment mode drivers, S6B0086 has a ?power down function? in order to reduce the power consumption. shl enable input enable output current driver status the other drivers status l erb elb while erb =?low?, current driver is enable d. disabled h elb erb while elb =?low?, current driver is enabled. disabled note: in the case of common driver application, power down function does not work. 1 2 n-1 n 1 2 n-1 n 1 2 n-1 n 1 2 n-1 n 1 2 n-1 ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ notes: 1. shl = high (elb = input, erb = output) current S6B0086's erb must be connected to the next S6B0086's elb. 2. when in 4-bit parallel interface mode: n = 20 when in 1-bit serial interface mode: n = 80 cl1 cl2 elb1(input1) erb1/elb2 (output1/input2) erb2/elb3 (output2/input3) erb3/elb4 (output3/input4) elb4 (output4)
80ch common/segment driver for dot matri x lcd S6B0086 27 operation timing dia gram (1) 4 - bit parallel mode interface seg ment driver ? when shl = ?low? 19 20 1 2 3 sc5 sc1 sc77 sc69 sc73 19 20 1 2 sc5 sc1 sc77 sc73 cl2 d1_sid elb (input) erb (output) cl1 sc1 - sc80 d2_dl sc7 sc3 sc79 sc71 sc75 sc7 sc3 sc79 sc75 d3_dm sc6 sc2 sc78 sc70 sc74 sc6 sc2 sc78 sc74 sc8 sc4 sc80 sc72 sc76 sc8 sc4 sc80 sc76 d4_dr ? when shl = ?high? 19 20 1 2 3 sc76 sc80 sc4 sc12 sc8 19 20 1 2 sc76 sc80 sc4 sc8 cl2 d1_sid erb (input) elb (output) cl1 sc1 - sc80 d2_dl sc74 sc78 sc2 sc10 sc6 sc74 sc78 sc2 sc6 d3_dm sc75 sc79 sc3 sc11 sc7 sc75 sc79 sc3 sc7 sc73 sc77 sc1 sc9 sc5 sc73 sc77 sc1 sc5 d4_dr
S6B0086 80ch common/ segment driver for d ot matrix lcd 28 (2) 1 - bit serial mode interface segment driver ? when shl = ?low? 79 80 1 2 3 sc2 sc1 sc80 sc78 sc79 79 80 1 2 sc2 sc1 sc80 sc79 cl2 d1_sid elb (input) erb (output) cl1 sc1 - sc80 ? when shl = ? high? 79 80 1 2 3 sc79 sc80 sc1 sc3 sc2 79 80 1 2 sc79 sc80 sc1 sc2 cl2 d1_sid erb (input) elb (output) cl1 sc1 - sc80
80ch common/segment driver for dot matri x lcd S6B0086 29 (3) single - type interface mode common driver ? when shl = ? low? 79 80 1 2 cl1 79 80 1 2 current driver's common area d4_dr com_data1 com_data2 com_data3 com_data79 com_data80 d2_dl ? when shl = ?high? 79 80 1 2 cl1 79 80 1 2 current driver's common area d2_dr com_data1 com_data2 com_data3 com_data79 com_data80 d4_dl
S6B0086 80ch common/ segment driver for d ot matrix lcd 30 (4) dual - type interface mode common driver when shl = ?low? cl1 d3_dm d2_dl com_data1 com_data3 com_data2 1 2 3 39 40 1 2 3 39 40 d4_dr com_data39 com_data40 com_data41 com_data42 com_data43 com_data79 com_data80 when shl = ?high? cl1 d3_dm d2_dl com_data1 com_data3 com_data39 com_data40 com_data2 1 2 3 39 40 1 2 3 39 40 com_data41 com_data42 com_data43 com_data79 com_data80 d4_dr
80ch common/segment driver for dot matri x lcd S6B0086 31 (5) common/segment driver timing (1/200 duty) cl1 m latched data (seg) com_data199 com_data200 199 200 1 199 200 com_data1 200 1 199 200 1 2 1 18 20 19 1 com1 v0 v1 v4 v5 com199 v0 v1 v4 v5 com200 v0 v1 v4 v5 seg_data1 seg1 v0 v1 v2 v3 v4 v5 cl2 cl1 d1 - d4 latched_data m enable out
S6B0086 80ch common/ segment driver for d ot matrix lcd 32 application informat ion 1 - bit serial interface mode (80 - ch segment driver) a) lower view (shl = l, ams = h ) s1 s80 s81 s160 sc80 sc1 erb cs ams shl elb d1_sid lcd panel sn sn+80 sc80 sc1 erb cs ams shl elb d1_sid sc80 sc1 erb cs ams shl elb d1_sid 1-bit serial data input d2_dl- d4_dr d2_dl- d4_dr d2_dl- d4_dr b) up per view (shl = h, ams = h) shl elb sc1 ams lcd panel elb sc1 sc80 elb cs ams erb 1-bit serial data input sc80 d2_dl- d4_dr d1_sid erb cs d1_sid shl ams cs erb sc80 sc1 d1_sid shl sn sn+80 s160 s81 s1 s80 d2_dl- d4_dr d2_dl- d4_dr
80ch common/segment driver for dot matri x lcd S6B0086 33 4 - bit parallel interface mode (80 - ch segment driver) a) lower view (shl = l, ams = l ) s1 s80 s81 s160 sc80 sc1 erb cs ams shl elb d1_sid-d4_dr lcd panel sn sn+80 sc80 sc1 erb cs ams shl elb sc80 sc1 erb cs ams shl elb 4-bit serial data input 4 d1_sid-d4_dr d1_sid-d4_dr 4 4 b) upper view (shl = h, ams = l) shl elb sc1 ams lcd panel elb sc1 sc80 elb cs ams erb 4-bit serial data input sc80 d1_sid-d4_dr erb cs d1_sid-d4_dr shl ams cs erb sc80 sc1 d1_sid-d4_dr shl sn sn+80 s160 s81 s1 s80 4 4 4
S6B0086 80ch common/ segment driver for d ot matrix lcd 34 single - type interface mo de (80ch common driver) lcd panel input data 1 sc80 sc1 cs ams shl d4_dr d2_dl c1 c80 cs ams shl d4_dr d2_dl sc80 sc1 c81 c160 cs ams shl d4_dr d2_dl sc1 sc1 c161 c240
80ch common/segment driver for dot matri x lcd S6B0086 35 dual - type interface mode (40ch + 40ch common driver) lcd panel (1/2) input data 1 sc80 sc1 cs ams shl d4_dr d2_dl cs ams shl d4_dr d2_dl sc80 sc1 cs ams shl d4_dr d2_dl sc80 sc1 cs ams shl d4_dr d2_dl sc80 sc1 cs ams shl d4_dr d2_dl d3_dm input data 2 sc40 sc41 sc80 sc1 c81 c160 c1 c80 c161 c200 c201 c240 c241 c320 c321 c400 lcd panel (2/2) note: using this application mode (dual - type common mode), the duty ratio can be reduced to half. in the case abale, 1/200 duty can be used to drive the 400 common lcd panel.
S6B0086 80ch common/ segment driver for d ot matrix lcd 36 application circuit example s1 s80 v0-v5 dispoffb m elb ams cs shl sc1 sc80 d1_sid - d4_dr cl1 cl2 erb seg - seg80 v0-v5 dispoffb m elb ams cs shl sc1 sc80 d1_sid - d4_dr cl1 cl2 erb seg - seg80 v0-v5 dispoffb m elb ams cs shl sc1 sc80 d1_sid - d4_dr cl1 cl2 erb seg - seg80 S6B0086 S6B0086 S6B0086 s81 s160 s161 s240 c1 v0-v5 dispoffb m cl1 ams cs shl sc1 sc80 d4_dr S6B0086 d2_dl com1 - com80 v0-v5 dispoffb m cl1 ams cs shl sc1 sc80 d4_dr S6B0086 d2_dl com1 - com80 v0-v5 dispoffb m cl1 ams cs shl sc1 sc80 d4_dr S6B0086 d2_dl com1 - com80 c80 c81 c161 c161 c240 controller dispoffb frame(m) com_data d1 - d4 cl1 cl2 com /seg com seg seg com com /seg 4 4 4 4 4 4 4 4 4 v dd r v2 v3 v4 v5 v ee v ss v1 r (n-4)r r r 240 x 240 lcd module
80ch common/segment driver for dot matri x lcd S6B0086 37 notes
S6B0086 80ch common/ segment driver for d ot matrix lcd 38 the information in this publication has been carefully checked and is believed to be entirel y accurate at the time of publication. samsung assumes no responsibility, however, for possible errors or omissions, or for any consequences resulting from the use of the information contained herein. samsung reserves the right to make changes in its products or product specifications with the intent to improve function or design at any time and without notice and is not required to update this documentation to refle ct such changes . this publication does not convey to a purchaser of semiconductor devices described here in any license under the patent rights of samsung or others. samsung makes no warranty , representation, or guarante e regarding the suitability of its products for any particular purpose, nor does samsung assume any liability arising out of the application or use of any product r circuit and specifically disclaims any and all liab ility, including without limitation any consequential or incidental damages. ? typical ? parameters can and do vary in different applications. all operating parameters, including ? typicals ? must be validated for each cu stomer application by the customer ? s technical experts. samsung products are not designed, intended, or authorized for use as components in systems intended for surgical implant in to the body, for other applica tions intended to support or sustain life, or for any other application i which the failure of the samsung product could create a situation where personal injury or death may occur. should the buyer purchase or use a samsung product for any such unintended or unauthorized application, the buyer shall indemnify and hold samsung and its officers, employees, subsidiaries, affiliates and distributors harmless against all claims, costs, damages, expenses, and reasonable attorney fees arising out of, either directly or indirectly, any claim of personal injury or death that may be associated with such unintended or unauthorized use, even if such claim alleges that samsung was negligent regarding the design or manufacture of said product. important notice graphic lcd d river ic data book 2002 samsung electronics all rights reserved. no part of this publication may be reproduced, stored in a retrieval system, or transmitted in any form or by any means, electric or mechanical, by photocopying, recording, or oth erwise, without the prior written consent of samsung electronics. samsung electronics co,.ltd san#24 nongseo - ri, kiheung - eup yongin - city kyungi - do, korea c.p.o. box #37, suwon 449 - 900 tel: 82 - 331 - 209 - 1431 fax: 82 - 331 - 209 - 1432 home page url: http://www.samsungsemi.com/ printed in the republic of korea *precautions for light light has characteristics to move electrons in the integrated circuitry of semiconductors, therefore may change the characteristics of sem iconductor devices when irradiated with light. consequently, the users of the packages which may expose chips to external light such as cob, cog, tcp and cof must consider effective methods to block out light from reaching the ic on all parts as the surfac e area, the top, bottom and the sides of the chip. follow the precautions below when using the products. 1. consider and verify the protection of penetrating light to the ic at substrate (board or glass) or product design stage. 2. always test and inspect produ cts under the environment with no penetration of light.

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